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HA-5127, HA-5127A
Data Sheet May 2002 FN2906.5
8.5MHz, Ultra-Low Noise Precision Operational Amplifier
The HA-5127 monolithic operational amplifier features an unparalleled combination of precision DC and wideband high speed characteristics. Utilizing the Intersil D. I. technology and advanced processing techniques, this unique design unites low noise (3nV/Hz) precision instrumentation performance with high speed (10V/s) wideband capability. This amplifier's impressive list of features include low V OS (10V), wide unity gain-bandwidth (8.5MHz), high open loop gain (1800V/mV), and high CMRR (126dB). Additionally, this flexible device operates over a wide supply range (5V to 15V) while consuming only 140mW of power. Using the HA-5127 allows designers to minimize errors while maximizing speed and bandwidth. This device is ideally suited for low level transducer signal amplifier circuits. Other applications which can utilize the HA-5127's qualities include instrumentation amplifiers, pulse amplifiers, audio preamplifiers, and signal conditioning circuits. This device can easily be used as a design enhancement by directly replacing the 725, OP25, OP06, OP07, OP27 and OP37. For the military grade product, refer to the HA-5127/883 data sheet.
Features
* Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V/s * Unity Gain Bandwidth. . . . . . . . . . . . . . . . . . . . . . 8.5MHz * Low Noise . . . . . . . . . . . . . . . . . . . . . . . 3nV/Hz at 1kHz * Low VOS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V * High CMRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126dB * High Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1800V/mV
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Applications
* High Speed Signal Conditioners * Wide Bandwidth Instrumentation Amplifiers * Low Level Transducer Amplifiers * Fast, Low Level Voltage Comparators * Highest Quality Audio Preamplifiers * Pulse/RF Amplifiers
Ordering Information
PART NUMBER (BRAND) HA7-5127A-5 HA9P5127-5 (H51275) TEMP. RANGE ( oC) 0 to 75 0 to 75 PACKAGE 8 Ld CERDIP 8 Ld SOIC PKG. NO. F8.3A M8.15
Pinout
HA-5127 (CERDIP, SOIC) TOP VIEW
BAL -IN +IN V-
1 2 3 4
8 BAL
+
7 V+ 6 OUT 5 NC
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2002. All Rights Reserved
HA-5127, HA-5127A
Absolute Maximum Ratings
Supply Voltage Between V+ and V- Terminals . . . . . . . . . . . . . 44V Differential Input Voltage (Note 3) . . . . . . . . . . . . . . . . . . . . . . . 0.7V Output Current . . . . . . . . . . . . . . . . . . . . Full Short Circuit Protection
Thermal Information
Thermal Resistance (Typical, Note 2) JA ( oC/W) JC (oC/W) CERDIP Package. . . . . . . . . . . . . . . . . . . 115 28 SOIC Package . . . . . . . . . . . . . . . . . . . . . 157 N/A Maximum Junction Temperature (Ceramic Package, Note 1). . . 175oC Maximum Junction Temperature (Plastic Package) . . . . . . . .150oC Maximum Storage Temperature Range . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range HA5127/27A-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Maximum power dissipation, including output load must be designed to maintain the maximum junction temperature below 175oC for Hermetic packages, and below 150oC for the plastic packages. 2. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 3. For differential input voltages greater than 0.7V, the input current must be limited to 25mA to protect the back-to-back input diodes.
Electrical Specifications
PARAMETER INPUT CHARACTERISTICS Offset Voltage
VSUPPLY = 15V, CL < 50pF, R S < 100 TEMP. (oC) HA-5127A MIN TYP MAX MIN HA-5127 TYP MAX UNITS V V V/oC nA nA nA nA V M VP-P nV/Hz nV/Hz nV/Hz pA/Hz pA/Hz pA/Hz
TEST CONDITIONS
25 Full
10.3 1.5 -
10 30 0.2 10 20 7 15 11.5 6 0.08 3.5 3.1 3.0 1.7 1.0 0.4
25 60 0.6 40 60 35 50 0.18 8.0 4.5 3.8 4.0 2.3 0.6
10.3 0.8 -
30 70 0.4 15 35 12 30 11.5 4 0.09 3.8 3.3 3.2 1.7 1.0 0.4
100 300 1.8 80 150 75 135 0.25 8.0 4.5 3.8 0.6
Average Offset Voltage Drift Bias Current
Full 25 Full
Offset Current
25 Full
Common Mode Range Differential Input Resistance (Note 4) Input Noise Voltage (Note 5) Input Noise Voltage Density (Note 6) 0.1Hz to 10Hz f = 10Hz f = 100Hz f = 1000Hz Input Noise Current Density (Note 6) f = 10Hz f = 100Hz f = 1000Hz TRANSFER CHARACTERISTICS Large Signal Voltage Gain V OUT = 10V, RL = 2k V CM = 10V
Full 25 25 25
25
-
25 Full
1000 600 114 1 5 10.0 11.7 111 16.5
1800 1200 126 8.5 11.5 13.8 160 70 25
-
700 300 100 1 5 10.0 11.5 111 16.5
1500 800 120 8.5 11.5 13.5 160 70 25
-
V/mV V/mV dB V/V MHz
Common Mode Rejection Ratio Minimum Stable Gain Unity-Gain-Bandwidth OUTPUT CHARACTERISTICS Output Voltage Swing
Full 25 25
RL = 600 RL = 2k
25 Full 25
-
-
V V kHz mA
Full Power Bandwidth (Note 7) Output Resistance Output Current TRANSIENT RESPONSE (Note 8) Rise Time Open Loop
25 25
25
-
-
150
-
-
150
ns
2
HA-5127, HA-5127A
Electrical Specifications
PARAMETER Slew Rate Settling Time (Note 9) Overshoot POWER SUPPLY CHARACTERISTICS Supply Current V S = 4.5V to 18V 25 Full Power Supply Rejection Ratio Full 3.5 2 4.0 4 3.5 16 4.0 51 mA mA V/V VSUPPLY = 15V, CL < 50pF, R S < 100 (Continued) TEMP. (oC) 25 25 25 HA-5127A MIN 7 TYP 10 1.5 20 MAX 40 MIN 7 HA-5127 TYP 10 1.5 20 MAX 40 UNITS V/s s %
TEST CONDITIONS V OUT = 10V
NOTES: 4. This parameter value is based upon design calculations. 5. Refer to Typical Performance Curves. 6. The limits for this parameter are guaranteed based on lab characterization, and reflect lot-to-lot variation. Slew Rate 7. Full power bandwidth guaranteed based on slew rate measurement using: FPBW = -------------------------- . 2VPEAK 8. Refer to Test Circuits section of the data sheet. 9. Settling time is specified to 0.1% of final value for a 10V output step and AV = -1.
Test Circuits and Waveforms
IN +
1.8k
OUT 50pF IN +
2k 50pF
OUT
200
FIGURE 1. LARGE AND SMALL SIGNAL RESPONSE TEST CIRCUITS
IN
IN
OUT
OUT
Vertical Scale: Input = 0.5V/Div., Output = 5V/Div. Horizontal Scale: 1s/Div. LARGE SIGNAL RESPONSE
+15V 2N4416 5k 5k +15V + AUT VIN 2k VOUT 2k TO OSCILLOSCOPE
Vertical Scale: 100mV/Div. Horizontal Scale: 200ns/Div. SMALL SIGNAL RESPONSE
NOTES: 10. A V = -1. 11. Feedback and summing resistors should be 0.1% matched.
-15V 2k
50pF
12. Clipping diodes are optional. HP5082-2810 recommended.
FIGURE 2. SETTLING TIME TEST CIRCUIT
3
Schematic Diagram
V+ 7 1 BALANCE 8
R15 QP37 QN45 QP55
R25 QP32
R1
R16 QP35
R2
R20
R21 QP43 QP44
R17 QP38
C5
4
QN57
D8 QP56
QN19
QN46
C4
QN47 R1A R2A QN51 C6 QN3 D53 D54 QP27 R9 QP36A D41 QN2 QN2A D22 QP40 QP36 QP26 R18 QN1A QN1 D9 QN4
QN13 C1 QN14 R7 QN15 R3 QP17 QP16 QP26 D33 R12 QN29 QN20
HA-5127, HA-5127A
QN52
6 OUT D34 QN18 QN7 QP21 R19 QP30
R14
R13
R24 QN12 Z58 D59 QN24 D60 R6 R4 QN25
D31 QN42A QN42 QN49 QN39 QN48 R10 C2
QN5
QN6
C3
QN50 R22 R23 R11
R5
R8 QN10
V-
4 SUBSTRATE
QN11 3 +INPUT 2 -INPUT
HA-5127, HA-5127A Application Information
V+ RT 10K 1 2 3 4 8
+
7 6 5
NOTE: Tested Offset Adjustment Range is |VOS + 1mV| minimum referred to output. Typical range is 4mV with RT = 10k. FIGURE 3. SUGGESTED OFFSET VOLTAGE ADJUSTMENT
CS + R1 R1 R3 R2
-
+ R3
R2 C3
Low resistances are preferred for low noise applications as a 1k resistor has 4nV/Hz of thermal noise. Total resistances of greater than 10k on either input can reduce stability. In most high resistance applications, a few picofarads of capacitance across the feedback resistor will improve stability. FIGURE 4. SUGGESTED STABILITY CIRCUITS
Typical Performance Curves
30 20
Unless Otherwise Specified: TA = 25oC, VSUPPLY = 15V
12
6
10 OFFSET VOLTAGE (V) 10 0 -10 -20 -30 -40 -50 -60 -60 0 1 10 100 1K 10K FREQUENCY (Hz) 100K 1M NOISE VOLTAGE (nV/Hz)
5 NOISE CURRENT (pA/Hz)
8
4
6 NOISE VOLTAGE
3
4
2
2 NOISE CURRENT -40 -20 0 20 40 60 80 100 120
1
0
TEMPERATURE (oC)
FIGURE 5. TYPICAL OFFSET VOLTAGE DRIFT vs TEMPERATURE
FIGURE 6. NOISE CHARACTERISTICS
5
HA-5127, HA-5127A Typical Performance Curves
0.14 0.12 0.1 CMRR (dB) 0.08 0.06 0.04 0.02 0 4 6 8 10 12 14 16 SUPPLY VOLTAGE (V) 18 20
Unless Otherwise Specified: TA = 25oC, VSUPPLY = 15V
(Continued)
140 120 100 80 60 40 20 0 10
INPUT NOISE VOLTAGE (VP-P)
100
1K 10K 100K FREQUENCY (Hz)
1M
10M
FIGURE 7. NOISE vs SUPPLY VOLTAGE
FIGURE 8. CMRR vs FREQUENCY
9
TA = 45 oC OFFSET VOLTAGE CHANGE (V)
6.0
8
5.0
VIO DRIFT (V)
7
4.0
6
3.0
5
2.0
4
1.0 5 TYPICAL UNITS
3 0 10 20 DAYS 30 40
0.0 0.0
1.0
2.0
3.0
4.0
5.0
TIME AFTER POWER ON (MINUTES)
FIGURE 9. OFFSET VOLTAGE DRIFT vs TIME
FIGURE 10. OFFSET VOLTAGE WARM UP DRIFT
140 120 100 -PSRR PSRR (dB) GAIN (dB) 80 +PSRR 60 40
40 30 20 10 PHASE (DEGREES) 0 PHASE -10 -20 -30 90 0 GAIN
20 0 10
-40
180
100
1K 10K 100K FREQUENCY (Hz)
1M
10M
100
1K
10K 100K 1M FREQUENCY (Hz)
10M
100M
FIGURE 11. PSRR vs FREQUENCY
FIGURE 12. CLOSED LOOP GAIN AND PHASE vs FREQUENCY
6
HA-5127, HA-5127A Typical Performance Curves
17 16 AVOL (100kV/V) AND VOUT (V) 15 14 13 12 11 10 9 8 7 6 5 4 0 2 4 6 8 10 LOAD RESISTANCE (k) VOUT AVOL SLEW RATE NORMALIZED TO 1 AT 30oC
Unless Otherwise Specified: TA = 25oC, VSUPPLY = 15V
1.05 RL = 2k 1.04 CL = 50pF 1.03 1.02 1.01 1.0 0.99 0.98 0.97 0.96 0.95 -60 -40 -20 0
(Continued)
20
40
60
80
100
120
TEMPERATURE (oC)
FIGURE 13. AVOL AND V OUT vs LOAD RESISTANCE
FIGURE 14. NORMALIZED SLEW RATE vs TEMPERATURE
28 2.82 2.80 SUPPLY CURRENT (mA) 2.78 2.76 2.74 2.72 2.70 2.68 -55 25 TEMPERATURE (oC) 125 VO = 0V OUTPUT VOLTAGE (VP-P) 24 20 16 12 8 4 0 0.4 0.8 1.2 FREQUENCY (MHz) 1.6 2.0 RL = 2k CL = 50pF
FIGURE 15. SUPPLY CURRENT vs TEMPERATURE
2.60 2.58 2.56 SUPPLY CURRENT (mA) 2.54 2.52 2.50 2.48 2.46 2.44 2.42 2.40 4 6 8 10 12 14 16 SUPPLY VOLTAGE (V) 18 20
FIGURE 16. MAX UNDISTORTED SINEWAVE OUTPUT vs FREQUENCY
NORMALIZED SLEW RATE AND BANDWIDTH 1.02 1.01 1.00 0.99 0.98 0.97 0.96 0.95 0.94 0.93 0.92 0.91 0.90 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE (V) 16 18 20 SLEW RATE BANDWIDTH BANDWIDTH AT 0dB AOL VOUT = 10V STEP RL = 2k, C L = 50pF
FIGURE 17. SUPPLY CURRENT vs SUPPLY VOLTAGE
FIGURE 18. BANDWIDTH AND SLEW RATE vs SUPPLY VOLTAGE
7
HA-5127, HA-5127A Typical Performance Curves
140 R L = 2k GAIN (dB) 120 100 GAIN (dB) 80 60 40 20 0 PHASE -135 10 100 1K 10K 100K 1M FREQUENCY (Hz) -180 10M 100M PHASE SHIFT (DEGREES) GAIN 0 -45 -90
Unless Otherwise Specified: TA = 25oC, VSUPPLY = 15V
(Continued)
20 15 10 5 0 PHASE SHIFT (DEGREES) AV = +1 RL = 2k CL = 50pF
GAIN
0 PHASE -45 -90 -135 1K 10K 100K 1M FREQUENCY (Hz) 10M -180 100M
FIGURE 19. OPEN LOOP GAIN AND PHASE
FIGURE 20. CLOSED LOOP GAIN AND PHASE
Horizontal Scale = 1s/Div. Vertical Scale = 0.002V/Div. ACL = 25,000V/V, EN = 0.08VP-P RTI FIGURE 21. PEAK-TO-PEAK NOISE VOLTAGE (0.1Hz TO 10Hz)
8
HA-5127, HA-5127A Die Characteristics
DIE DIMENSIONS: 104 mils x 65 mils x 19 mils 2650m x 1650m x 483m METALLIZATION: Type: Al, 1% Cu Thickness: 16kA 2kA SUBSTRATE POTENTIAL (Powered Up): VPASSIVATION: Type: Nitride (Si3N4) over Silox (SiO2, 5% Phos.) Silox Thickness: 12kA 2kA Nitride Thickness: 3.5kA 1.5kA TRANSISTOR COUNT: 63 PROCESS: Bipolar Dielectric Isolation
Metallization Mask Layout
HA-5127
BAL
V+
OUT
NC
BAL
-IN
+IN
V-
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
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